Automatic beam stabilization



R. J. KLEIN AUTOMATIC BEAM STABILIZATION No v. 13, 1956 2 Sheets-Sheet 1Filed June 16, 1953 apny dwy .as n

INVENTOR ATTOQNEV Nov. 13, 1956 R. J. KLEIN 2,770,756

AUTOMATIC BEAM STABILIZATION Filed June 16, 1953 2 Sheets-Sheet 2 HAPEnd 1 q: 3-

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BY Mad Q ATTORNEY United States Patent AUTOMATIC BEAM STABILIZATIONRudolph J. Klein, Downers Grove, 11]., assignor to the United States ofAmerica as represented by the United States Atomic Energy CommissionApplication June 16, 1953, Serial No. 362,086

5 Claims. (Cl. 315-22) The present invention relates to cathode ray tubebeam regulation and more especially to an arrangement for regulating thebeam current in a cathode ray tube used to store binary information inan electrostatic memory system for a computer.

One problem associated with use of cathode ray tubes as storage elementsin memory systems for electronic computers is the faulty operation ofthe memory due to a variation in tube beam current. In a typical memorysystem, a binary l is stored by directing the beam of electrons to aspot on the inner surface of the tube. The incident beam gives rise tosecondary emission of electrons from the phosphor, and leaves apotential well which may be detected by directing the beam again at theparticular storage spot. A pick up plate placed external to the glassface of the tube serves as one element of a capacitor, with the glasssurface being the dielectric and the coating inside the tube being theother capacitor element. The size and shape of the electrical signaldetected by the plate and delivered to an associated amplifier dependsupon the size and shape of the potential well and the magnitude of thebeam current, among other factors. For a complete description of anelectrostatic memory see Williams, Proceedings of The Institution ofElectrical Engineers, vol. 96, No. 3, pp. 81-100.

The intensity of the beam current is normally controlled by the biasvoltage on the grid of the cathode ray gun which forms and focuses thebeam in the tube. Any change in the filament voltage of the tube will,of course, change the beam current. Likewise gun drift, caused byheating of the parts of the tube during operation Will, by changing therelative positions of the tube elements, change the beam currentappreciably. For example, even a change in filament voltage may alterthe beam current so appreciably that the size of the signal pulse maychange by as much as 75%. It is therefore evident that the magnitude ofthe beam current must be very closely regulated.

Costly and elaborate filament current regulators might be devised tomaintain that variable constant, but in a memory system comprising someeighty cathode ray tubes, the space and cost requirements of such extraequipment is prohibitive. Moreover, filament current is only one of theseveral variables contributing to the signal detected from the storagetube, so that controlling it alone would not insure reliable memoryoperation.

Repeated consultation of spots adjacent any given memory location causethe potential well to partially refill with the electrons emitted at theadjacent locations. After suflicient number of such read-arounds, anydeep potential well, or 0 storage pattern, will appear to be the same asthe'partially refilled well, or 1 pattern. To allow for such effect insystems of the prior art, the output signal must be sampled only nearits extreme positive excursion, above the amplitude of the signal frommost refilled Os. Yet the sampling amplitude should ice be kept low,because the beam intensity necessary to produce a large positive signalduring the first half of the reading cycle for binary 1 unfortunatelyalso produces a large positive signal during the second half of thereading cycle for binary 0. The resulting strobing amplitude setting hasbeen a compromise which severely limits the number of consultations ofclosely adjacent spots (read-arounds) permissible before the informationmust be regenerated, and is susceptible to errors caused by even smallchanges in normal signal amplitude due to tube aging, amplifier drift,and so forth.

With a knowledge of the Shortcomings of cathode ray tube utlization inthe prior art, applicant has as a primary object of his inventionprovision of a novel method of and means for controlling the beamcurrent intensity in a cathode ray tube memory system. A special objectof the invention is provision of a more accurate, more flexible memorysystem utilizing cathode ray tubes as storage elements. A further objectis to provide a novel mode of operation of cathode ray tube memorysystems characterized by greater reliability in access to storedinformation.

Other objects and many advantages of the invention will be apparent fromthe following detailed description of a preferred embodiment thereof,when read together with the appended drawings, in which:

Figure 1 illustrates a logical block diagram of a memory systemutilizing the present invention,

Figure 2 is a schematic circuit diagram showing a preferred design of aportion of the memory system of Figure 1,

Figure 3 is a pulse routine chart showing the relative sequence requiredfor operation of a memory system constructed according to the invention,and

Figure 4 illustrates sample output waveforms of the binary signals fromthe tubes.

According to the present invention a binary l is recorded in a selectedposition of the matrix of possible storage spots on each tube.Deflection voltages are set up on the tube deflecting platesperiodically to focus the beam on the selected position, and the beam isturned on to sample the spot. The signal obtained on the pickup plate isamplified and compared to a reference voltage. The output of the voltagecomparison device is used to adjust incrementally the bias voltage onthe cathode ray gun so as to rewrite the input 1 signal at more nearlythe correct amplitude. Errors due to changes in amplification or in beamintensity thus cause a selfadjustment tending to eliminate those errors.

Referring nowto the logical diagram of Figure l, a cathode ray tube 3,which may be of the type RCA 31 Pl, forms the storage element. Pick upplate 4 is disposed over the face of the tube and is connected to theinput of a wide-band amplifier 5 such as that described by Williams,supra. One output of the amplifier is coupled to Strobe gate 6, alogical and gate which may be enabled for a selected interval by aStrobe pulse on lead 10. The output of gate 6 is coupled to one input ofa logical or gate 16, through which information may be fed into thestorage system from lead 17. The output of gate 16 is utilized to settoggle 23, the output of which is coupled to the intensity grid 12 oftube 3 through logical and gate 8 and logical or gate 2. Gate 2 may alsoreceive beam intensification pulses from lead 1, and transmits them togrid 12. Gate 8 is normally closed, but may be opened by an enablingvoltage from toggle 23 so that it will pass rewrite Dash pulses fromlead 9.

The output of amplifier 5 is also coupled to the automatic beamstabilization (A. B. S. hereinafter) circuit 13 through logical and gate15 along lead 19, and that circuit is coupled to the cathode 22 tocontrol the bias on tube 3, which may normally be about 90 volts. Andgate 15 is enabled or disabled by the output of and gate 14, whichoutput is controlled by the A. B. S. control and timing circuits and apulse denoted AP from the memory system pulse generator on lead 24. .A.8. S. timing is provided by clock 43, which may be a free-runningmultivibrator circuit, for example, having a frequency which isadjustable so that it may 'be set equal to or lower than the frequencyof one memory major cycle. Normally, three memory minor cycles arerequired for each A. S. cycle. Access to the memory is prevented,however, for only two minor cycles. The first minor cycle is requiredfor synchronization, completing the memory cycle already begun, andpreventing further execution of orders. The second minor cycle isrequired for writing a fresh 1 signal on the tubes of the memory at tieselected location. and the third minor cycle is utilized for reading the1 .signal and regulating the beam current responsive to the amplitude ofthat signal. The pulse routine generator for the entire memory iscoupled to'the A. B. S. control circuit to deliver signals thereto andreceive signals therefrom.

Zero location on the raster may be conveniently chosen for storage ofthe A. B. S. 1 charge pattern because to direct the beam to thatlocation, no deflection signal from either the control counter orregenerator counter, which set up beam deflection voltages, is required.Therefore, the deflection counter may be cleared to Zero during the A.B. S. cycle and the regenerator counter may be blocked temporarilyWithout interfering with the A. B. S. operation.

Operation of a typical A. B. S. cycle and its relation to a major memorycycle may be understood from the pulse chain of Figure 3 and the logicaldiagram of Figure 1. An oscillator or memory clock 21 supplies thetiming pulses through appropriate pulse generators 2632, which receiveclock pulses and produce rectangular control pulses of the properamplitude, width, and polarity for the particular task to be done. Someof the output pulses from the generators begin at the same instant asthe incident input pulse, such as pulses AP, TD, Dash, Dot, A, B, and C,on leads 24, INT-35. Other output pulses begin at the end of the inputpulse, such as the pulses on leads 36-41. Between A. B. S. cycles, theright hand halves of toggles are conducting, such that a positive(enabling) signal may be taken on the respective output leads therefrom,and a negative (disabling) signal from the left hand halves of thetoggles.

Synchronization cycle At selected intervals, clock 43 will produce apulse on lead 44, flipping toggle 45 so that the left side becomesconducting. And gate 46, normally disabled by the voltage on lead 47,thereby becomes enabled. The next Dash pulse occurring on lead 31 willthen pass through gate 46 and hip toggle 49, changing the potentialon-lead 50 so as to disable or block and gate 51. When the subsequentDash end pulse on lead 38 arrives at gate 51, it cannot pass through totrip pulse generators 30-32; therefore, pulses A, B, and C will not beproduced. Because the pulse outputs A, B, C start and control thearithmetic cycle, no such cycle may be started by the computer whileduring an A. B. S. cycle. The signal on lead 59 is changed from negativeto positive as toggle 49 flips,

and or gate 53 delivers a corresponding positive signal on lead 57,actuating or gate 55 to enable and gate 53. And gates 60, 69 are alsoenabled by the positive signal on lead 59.

Writing cycle A new cycle may be started by a memory clock signal,actuating Dot pulse generator 27 and AP pulse generator 26. Since theand gate 53 is enabled, the pulse generated on lead 32. will passthrough that gate, through or gate 56, travel along lead 1 to or gate 2,and

. 4 through gate 2 to grid 12 of the tube 3 to intensify the electronbeam. The Dot pulse from gate 50 is also sent along lead 65 to gate 66,but that gate is disabled because of the negative signal on lead 67.Simultaneously with the Dot pulse, the AP pulse is generated on leads24, 72', and delivered to and" gates 14, 73. Gate 73 is enabled by asignal from the address toggle corresponding to zero position on theraster, so that the pulse passes through to trip th Strobe pulsegenerator '74. The resulting Strobe pulse is delivered through or gate76' and lead 10 to enable and gate 6. For the duration of the Strobepulse, any positive signal from the amplifier 5 resulting from the beamintensification will pass gates 6 and 16 and flip toggle 23 to the statewherein the right hand half couducts, delivering an enabling voltage togate 8 along lead '7. The entire amplifier signal resulting from thebeam turn-on also is coupled along lead 19 to and gate 15, which willdeliver an output signal to turn on A. B. S. circuit 13 only whenenabled by a signal from and gate 14. Gate 14 is enabled and will passtheAP pulse on lead 24, simultaneously with the Dot pulse only if lead25 carries a positive signal. Normally, after receipt of an A pulse onlead 33', toggle 61 is set so that lead 25 contains a negative signal todisable gate 14, so that the pulse on lead 36 also actuates the twitchdeflection pulse generator 28 to move the beam to the adjacent disturbedraster position and to produce the TD pulse on lead 30. That pulsepasses and" gate 60 because of the enabling signal on lead 59 and flipstoggle 61to its other stable state, thus enabling gates 14 and 62through lead 25. At

the end of the TD pulse, a pulse is produced on lead 37 to actuate Dashgenerator 29, which produces a relatively long puls on lead 31. Thatlong pulse passes through enabled gate 62, along lead 63 to gate 56,through that gate, along lead 1 to gate 2, and through gate 2 to againintensify the beam at the disturbed raster position. The Dash pulse alsotravels along lead 31 to gate 46, but is blocked because toggle hasreturned to its original position, removing the enabling signal fromlead 47. Simultaneously the Dash pulse passes and gate 39, which isenabled by a signal from the address toggles as described above, travelsalong lead 9 to gate 8, and passes through to grid 12 if lead 7 isenabled to insure beam intensification. The following Dash end pulse onlead 38 is again blocked at gate 51 so that no A, B, or C pulses will beproduced.

Current regulation cycle The next pulse from clock 21 initiates anotherpulse train as shown in Figure 3 and described above. The Dot pulse fromlead 1 will again intensify the beam in tube 3, causing a signal toappear at the output of amplifier 5. The Dot pulse will also travelalong lead 65 and pass through enabled gate 66 to flip toggle 49 back toits normal position, changing the signal on lead to enable gate 51, andchanging the signal on lead 59 to disable gate 60. Simultaneously, APand Strobe pulses are delivered to gates .14, 6 respectively, the formerpulse passing gate 14 to enable gate 15. The amplifier output pulse iscoupled back to open gate 15,. and is passed to the A. B. S. circuit 13,where it causes an incremental adjustment in beam current tending ,tocorrect any departure of the amplifier signal from the selectedamplitude, as is more fully described hereinafter. The subsequent AP Endpulse from lead 68 will not pass gate 69, now blocked by the signal fromtoggle 49. Likewise the next TD pulse on lead 30 is blocked through thedisabling of gate by the signal on lead 59 from toggle 49. Thefollowing.

Dash pulse on lead 31 is also'blocked at gate 46 by'the disabling signalfrom toggle 45 on lead 47, but may pass simultaneously through open gate62, gate 56, and gate 2 and through open gates 39, 8 and gate 2 to turnon the beam in tube 3 at the re-write position. Thus a fresh 1 signal isregenerated at the zero raster position. The following Dash End pulse isdelivered to gate 51, which is now enabled by the signal on lead 50, andpasses along lead 52 to trip pulse generator 30 to produce the A pulseon lead 33' and a further trigger pulse onlead 39. Generators 31, 32 aretriggered in sequence to produce the B and C pulses, which, togetherwith pulse A, start a new computation cycle in the arithmetic unit ofthe associated computer.

Referring now to Figure 2, a preferred embodiment of the A. B. S.circuit is illustrated. Cathode ray tube 3, including cathode 22 andintensity grid 12, is provided with a pick-up plate 4 coupled to theinput of amplifier 5. The output of the amplifier is coupled to thediscriminator circuit shown in Figure 1 and also to the and gate 15along lead 19. The logical gate 15 may comprise a difference amplifiercircuit including twin-triode tube 70, potentiometer 71 in the gridreturn circuit of the left half of tube 70, and input leads 19, 71'. Therighthand grid of tube 70 is normally held at +40 volts by the output ofgate 14 while the left hand grid is held at ground or below, so that theright half of tube 70 conducts heavily and the left section is cut off.Potentiometer 71 may be adjusted to select the desired amplitude for the1 signals since it determines the quiescent voltage at the left-handgrid. Responsive to an AP pulse, gate 14 delivers a 40 volt negativepulse to tube 70 on lead 71', lowering the right hand grid potential to0 volts. If the signal developed on lead 19 during the AP pulse intervalis greater than the bias voltage and therefore greater than the desired1 amplitude, the left section of tube 70 will begin to conduct, cuttingoff the right section. When the pulse on lead 19 decays away or thevoltage on lead 71 is again raised to +40 volts, the right section willagain conduct and the left section will be cut off. Therefore, apositive pulse of relatively short duration is formed on lead 72 bytheswitching action of tube 70.

This positive pulse is lengthened in two steps: it is R-C coupled tocathode follower 73 through a network 74, 75 of relatively long timeconstant, such as 470,000 ohms resistor 75 and .001 microfarad condenser74. The distributed capacity and interelectrode capacity of the tubealso contribute to the pulse lengthening and are indicated by dottedcondenser 76. is coupled through condenser 77 to the grid of tube 78 fora second lengthening step. A source of regulated high negative voltage79, which may be substantially 2500 volts, is provided with bleedernetwork 80, from which are derived the plate, grid, and cathode voltagesof tube 78 at point 81, potentiometer arm 82, and point 83,respectively.

A further negative supply 84 is floated on the high voltage supply 79and utilized to supply energizing voltages to triode 85. The cathode oftriode 85 is coupled to the most negative terminal of supply 84, whichmay be substantially 2650 volts with respect to ground, while the anodeis coupled through 2000 ohm resistor 86 to point 83. The control grid oftriode 85 is coupled through condenser 87 to a source of negative pulsesdesigned to cut off current through the tube and through 100,000 ohmresistor 88 to point 83. 1 microfarad condenser 89 is coupled betweenpoints 81, 83 on divider 80 and acts as a storage capacitor. A verylarge resistance 90, which may be 100 megohms, couples the cathode oftube 78 to point 83, and is shunted by large condenser 91, which may be1 microfarad, to provide a very long time constant for lengthening orsustaining the input pulse from condenser 77 to tube 78. The cathode oftube 78 is coupled directly to the cathode 22 of tube 3, while the grid12 of tube 3 is coupled directly to the anode of tube 85.

The intensity of beam current in tube 3 depends upon the bias voltagebetween grid 12 and cathode 22, which voltage is determined by the dropacross resistor 86 plus The output of tube 73 r the voltage acrosscondenser 91. Tube 78 is normally cut off, despite the small positivegrid bias from arm 82, because its cathode voltage is held up to thepeak value of the incoming positive pulses by the large condenser 91 andalso because only a small bleeder current, say 3 milliamperes, flowsthrough network 80 to establish the positive grid bias. Condenser 89 isprovided as an accumulator to store up charge from the relatively smallvoltage drop due to the bleeder current. Tube normally conducts heavily,because of the coupling resistor 88.

During the Current regulation cycle above described, a beam turn-onnegative pulse applied to condenser 87 from gate 2 of the discriminatorwill drive the connected grid below cut off, stop conduction throughtube 85, and raise the potential of lead 92 to that of supply terminal83, which rise is sufiicient to turn on the cathode-ray tube beam, theonly remaining bias voltage being that on condenser 91. The resultingsignal isdetected, amplified, and if too large, will cause a positivesignal input to tube 78. That tube will begin to conduct heavily ascondenser 89 discharges through the tube, thereby further charging upcondenser 91. Thus the cathode-ray tube bias is increased by a voltagedetermined by the amount of charge transferred between condensers 89,91. It is apparent that condenser 91 will continually discharge throughresistor 90, so that the absence of a positive pulse input to tube 78 atthe appropriate A. B. S. sampling time allows a reduction of the chargeon the condenser and a corresponding reduction in cathode-ray tube bias.Thus signals which are too small to switch the current through tube 70will result in a greater beam current.

The setting of arm 82 determines the firing voltage of tube 78, andthereby determines the duration of the period of tube conductionresponsive to a positive input pulse, so that it also determines theincrement of charge per cycle transferred to condenser 91 to change thebias voltage.

Having described his invention, applicant claims as novel:

1. An improved memory system of the type utilizing a cathode ray tubefor storage of binary information, a storage surface in said tube, meansfor forming a beam in said tube and directing it toward said surface,and a pickup plate disposed adjacent the tube face, comprising means forstoring a selected binary reference signal in a predetermined rasterposition of said tube, means for directing said beam periodically tosaid position to sample the information stored, means for amplifying thesignal induced in said plate when said beam is directed to saidlocation, a bias circuit connected between the cathode and control gridof said tube, means for continuously decreasing the bias voltage acrosssaid circuit to increase the intensity of said beam, and means forperiodically decreasing the intensity of said beam comprising normallydisabled circuit means for deriving a signal proportional to thedifference in amplitude of two input signals and provided with a firstinput coupled to said amplifying means, a second input, and an outputcoupled to said bias circuit to increase the bias voltage responsive tosaid derived signal, a source of reference potential coupled to saidsecond input, and means for periodically enabling said circuit means toturn on said beam at said predetermined position.

2. In a memory system comprising a cathode ray tube, a pick up platecoupled to the screen thereof, an amplifier coupled to said plate, meansfor establishing an electron beam within said tube, electrodes fordeflecting said beam about said tube to a raster of position responsiveto a series of control voltages, and a grid for controlling theintensity of said beam; the improvement comprising a grid driver stageprovided with input and output circuits, said output circuit beingcoupled to said grid for determining the voltage impressed thereon, adifference amplifier having two input circuits and an output circuit,said output circuit being coupled to the input of said driver stage, oneinput being coupled to said amplifier output circuit, first andsecondsources of reference potentials coupled respectively to said inputcircuits of the difference amplifier a source vof reference voltagepulses coupled to the other input ,of the driver stage, a clock pulsegenerator coupled to said source of reference pulses for timing saidpulses, and means responsive to said clock pulse generator forperiodically directing said beamfto a selected raster position toproduce a reference signalfor said difierence amplifier.

'3. In a cathode ray tube storage system including a storage tubeprovided with a control grid and a cathode, a pickup device, and anamplifier, the improvement comprising: means for producing an electricalimpulse of magnitude proportional to the deviation of the amplifieroutput signal over a standard amplitude; a first pulse lengtheningcircuit coupled to said pulse producing means :to sustain the crestamplitude of said pulse; a second pulse lengthening circuit providedwith a storage condenser and'coupled to said first lengthening circuitto further sustain the crest amplitude of said pulse; a bias circuitcomprising a first resistor connected in series with said storagecondenser between the cathode and control grid of said storage tube; asource of current and a switching device connected in series across saidfirst resistor to normally supply a bias current therethrough; means forperiodically cutting off current flow through said first resistor toreduce said bias and turn on said cathode ray beam; and a dischargeresistor connected in shunt with said storage condenser to continuouslylower the bias voltage on said cathode ray tube, actuation of saidsecond lengthening circuit responsive to a signal greater than saidstandard amplitude increasing the charge stored on said condenser,thereby increasing the bias on said cathode ray tube.

4. In a cathode ray tube storage system a bias network comprising firstand second resistances connected in series between the grid and cathodeof said tube and a storage condenser connected in parallel with saidsecond resistor; first and second current switching devices connectedrespectively to said resistors, said first device being normallyconducting and said second device being normally non-conducting;respective voltage sources connected to energize said switching devices;a second condenser coupled to one of said sources for chargingtherefrom; means for periodically interrupting thecurrent through Saidfirst switching device and its associated resistor, thereby lowering thebias voltage and turning on the cathode ray beam; circuit meansresponsive to the amplitude of the signal voltage produced by said beamturn on for actuatingsaid second switching device only if said signal isgreater than a pre-deterrnined magnitude; said second condenser beingcoupled in series with said second switching device and its resistor tochargesaid first condenser Whilecurrent flows through said'seconddevice, the increased charge on said storage condenser increasing thebias voltage of said tube and reducing the beam current thereof.

5. In an improved memory system of the type comprising a cathode raytube, a source of electrons, a storage surface, means for accelerating abeam of electrons toward said storage surface, means including a biasvoltage for cutting off said beam, means for directing said beam aboutsaid surface'to discrete raster of points, in response to a series oforder voltages, a pickup electrode adjacent said surface, and anamplifier coupled to said electrode, the improvement comprising: meansfor periodically interrupting said directing means,'means' forestablishing a selected order voltage on said directing means to directsaid beam to a selected raster point after each interruption, means forestablishing a selected charge pattern on said surface at saidselectedpoint, means for re-intensifying said beam at said point toproduce a signal responsive to interrogation of said charge pattern, asource of reference voltage, means for comparing said signal and saidvoltage to produce a correction signal, means for continuouslydecreasing the magnitude of said bias voltage, and means forincrementally increasing the magnitude of said bias voltage responsiveto each said correction signal to control said beam intensity.

References Cited in the file of this patent UNITED STATES PATENTS2,523,328 Ranks Sept. 26, 1950 2,589,460 Tuller Mar. 18, 1950 2,642,550Williams June 16, 1953 2,671,607 Williams et a1 Mar. 9, 1954

